Non-volatile memory devices are able to store information without the need of any power supply. For this reason they are very advantageous for many applications, particularly in mobile devices operating a maximum time with a minimum of energy stored in a tiny battery. Similar to other micro-electronic devices, the microscopic structures of non-volatile memory devices are constantly miniaturized thereby increasing the storage capacity of the device and lowering its manufacturing costs.
There is a number of different concepts and physical phenomena current and future non-volatile memory devices are based on. In PCRAMs (PCRAM=Phase Change Random Access Memory) each storage element comprises a chalcogenide alloy (for example Ge2Sb2Te5) or any other material which is switched between a highly resistive amorphous state and a low resistive crystalline state.
In a CBRAM (CBRAM=Conductive Bridging Random Access Memory), each storage element is a conductive bridging junction (CBJ; further know as PMC=Programmable Metallization Cell). An electrically insulating matrix material comprising small regions or islands of electrically conductive material is arranged between two electrodes. One of these electrodes is chemically inert. Throughout this application, an electrode is called chemically inert if its chemical state is not altered in the process of programming of the storage element. The other electrode comprises an electrochemically active material. A voltage across the storage element above a predefined threshold drives material from the active electrode into the insulating matrix thereby increasing the conductive islands which finally form a conductive bridge across the storage element between the electrodes. This conductive bridge reduces the electrical resistance of the storage element by several orders of magnitude. A voltage with reversed polarity across the storage element drives patterns of the conductive island back to the active electrode thereby reducing the conductive islands, destroying the conductive bridge and increasing the electrical resistance of the storage element by several orders of magnitude.
An advantageous architecture of memory devices with resistive storage elements is the so called NAND or chain architecture. A number of storage elements (for example 8, 16 or 32) are connected in series. A transistor is connected in parallel to each single storage element forming a switchable bypass. For the access to a certain one of the storage elements, the bypass transistor of this certain storage element is in a highly resistive OFF-state while all the other transistors are in a highly conductive ON-state thereby bypassing their respective storage elements. In this way, the voltage applied to the chain of storage elements or a current flowing through the chain solely affect the selected one of the storage elements.
FIG. 20 displays a schematic view of a vertical section across a chain of eight CBJ storage elements in a conventional memory device. FIG. 21 displays a schematic circuit diagram of the chain. The device comprises a substrate 10 with a surface 12. An active area 14 is formed at the surface 12 of the substrate 10. Gate oxide layers 16 electrically insulate word lines 18 from the active area 14. The word lines 18 are covered by a thin electrically insulating layer 20. A thick electrically insulating layer 22 is deposited over the surface 12 of a substrate 10, the word lines 18 and the thin insulating layers 20. Through-hole conductors 24 are arranged in through-holes in the thick insulating layer 22. The lower end of each through-hole conductor 24 abuts on source/drain regions 26 within the active area 14. Those parts of the active area 14 arranged between source/drain regions 26 and directly under gates 18 are channel regions 28. Horizontal beam-shaped first and second electrode bars 30, 32 are arranged at and electrically conductively connected to the upper ends of the through-hole conductors 24. The ends of the electrode bars 30, 32 form first and second electrodes 34, 36. Each second electrode 36 is arranged vertically above a first electrode 34. A storing material 38 is arranged between each pair of first and second electrodes 34, 36. As an example, the first electrodes 34 are made of an electrochemically active material and the second electrodes 36 are made of a chemically inert material as already described above. The storing material 38 is an electrically insulating matrix with small regions or islands of an electrically conductive material.
The source/drain regions 26, the channel regions 28 and the word lines 18 form transistors 42, the word lines 18 serving as gate-electrodes. The conductivities of the channel regions 28 are controlled via voltages applied to the word lines 18. Each storing material 38 together with the adjacent first and second electrodes 34, 36 form a resistive storage element 44. The arrangement of the first and second electrodes 34, 36 and the storing material 38 is such that the direction of the electrical field and of the electrical current within the storing material 38 of each storage element 44 is vertical to the surface 12 of the substrate 10. Therefore, the storage elements 44 are called vertical.
As can be easily seen from FIG. 20, the geometry of the conventional CBRAM device is rather complicated causing high manufacturing costs.